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Bit-serial architectures
Byte-serial bit-parallel format
EPIC
EPIC architecture
Explicitly parallel instruction computing
IA-64
IA-64 architecture
Intel architecture 64
Intel architecture 64 bits
Mixed bit-serial parallel architectures
Mixed bit-serial-parallel architecture
Serial-parallel

Translation of "mixed bit-serial-parallel architecture " (English → French) :

TERMINOLOGY
see also In-Context Translations below
mixed bit-serial-parallel architecture | serial-parallel
http://iate.europa.eu/FindTerm (...) (...) [HTML] [2017-12-31]
architecture série parallèle
http://iate.europa.eu/FindTerm (...) (...) [HTML] [2017-12-31]
http://iate.europa.eu/FindTerm (...) [HTML] [2017-12-31]
mixed bit-serial parallel architectures
http://iate.europa.eu/FindTerm (...) (...) [HTML] [2017-12-31]
architectures en bits mixtes série parallèles
http://iate.europa.eu/FindTerm (...) (...) [HTML] [2017-12-31]
http://iate.europa.eu/FindTerm (...) [HTML] [2017-12-31]
bit-serial architectures
http://iate.europa.eu/FindTerm (...) (...) [HTML] [2017-12-31]
architectures en bits série
http://iate.europa.eu/FindTerm (...) (...) [HTML] [2017-12-31]
http://iate.europa.eu/FindTerm (...) [HTML] [2017-12-31]
EPIC architecture | explicitly parallel instruction computing architecture | explicitly parallel instruction computing | EPIC | Intel architecture 64 bits | Intel architecture 64 | IA-64 | IA-64 architecture
http://gdt.oqlf.gouv.qc.ca/fic (...) (...) [HTML] [2018-01-01]
architecture EPIC | architecture IA-64
http://gdt.oqlf.gouv.qc.ca/fic (...) (...) [HTML] [2018-01-01]
http://gdt.oqlf.gouv.qc.ca/fic (...) [HTML] [2018-01-01]
byte-serial bit-parallel format
http://www.btb.termiumplus.gc. (...) (...) [HTML] [2018-01-01]
sous format série-parallèle
http://www.btb.termiumplus.gc. (...) (...) [HTML] [2018-01-01]
http://www.btb.termiumplus.gc. (...) [HTML] [2018-01-01]
IN-CONTEXT TRANSLATIONS
For those instruments with a parallel bus architecture, the continuous throughput rate is the highest word rate multiplied by the number of bits in a word.
http://eur-lex.europa.eu/legal (...) (...) [HTML] [2002-12-31]
Pour les instruments ayant une structure de bus parallèle, le débit continu est la vitesse de mots la plus élevée multipliée par le nombre de bits dans un mot.
http://eur-lex.europa.eu/legal (...) (...) [HTML] [2002-12-31]
http://eur-lex.europa.eu/legal (...) [HTML] [2002-12-31]


Others have searched : epic architecture     ia-64 architecture     intel architecture     intel architecture 64 bits     bit-serial architectures     byte-serial bit-parallel format     explicitly parallel instruction computing     explicitly parallel instruction computing architecture     mixed bit-serial parallel architectures     mixed bit-serial-parallel architecture     serial-parallel     


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Date index: 2021-06-30
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